计算机系统I-处理器设计

The Processor: Design

Instruction execution in RISC-V

RISC-V fields (format)

RISC-V operands

RISC-V register conventions

RISC-V assembly language

Datapath

Fetch

Take instructions from the instruction memory, modify PC to point the next instruction.

Instruction fetching needs three elements: Instruction memory, Program counter Adder.

Instruction decoding & Read Operand

Will be translated into machine control command. Reading Register Operands, whether or not to use.

Reorganization instructions, such as separating and merging data and program parts.

Executive Control

Control the implementation of the corresponding ALU operation

Memory access

Write or Read data from memory. Only ld/sd

Write results to register

If it is R-type instructions, ALU results are written to rd

If it is I-type instructions, memory data are written to rd

Modify PC

for branch instructions